Algorithms and Heuristics in VLSI Design
Identifieur interne : 001C64 ( Main/Exploration ); précédent : 001C63; suivant : 001C65Algorithms and Heuristics in VLSI Design
Auteurs : Christoph Meinel [Allemagne] ; Christian Stangier [Allemagne]Source :
- Lecture Notes in Computer Science [ 0302-9743 ] ; 2002.
Descripteurs français
- Pascal (Inist)
English descriptors
- KwdEn :
Abstract
Abstract: The increasing complexity of nowadays VLSI designs makes it hard up to impossible to check their correctness by using validation methods like simulation. Therefore there is is a growing demand for formal verification methods in VLSI design and verification.
Url:
DOI: 10.1007/3-540-36383-1_7
Affiliations:
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Le document en format XML
<record><TEI wicri:istexFullTextTei="biblStruct"><teiHeader><fileDesc><titleStmt><title xml:lang="en">Algorithms and Heuristics in VLSI Design</title><author><name sortKey="Meinel, Christoph" sort="Meinel, Christoph" uniqKey="Meinel C" first="Christoph" last="Meinel">Christoph Meinel</name><affiliation><country>Allemagne</country><placeName><settlement type="city">Trèves (Allemagne)</settlement><region type="land" nuts="1">Rhénanie-Palatinat</region></placeName><orgName type="university">Université de Trèves</orgName></affiliation></author><author><name sortKey="Stangier, Christian" sort="Stangier, Christian" uniqKey="Stangier C" first="Christian" last="Stangier">Christian Stangier</name></author></titleStmt><publicationStmt><idno type="wicri:source">ISTEX</idno><idno type="RBID">ISTEX:DBC30EF32B09EE3E8F8FF41251217F91E1C6AC9D</idno><date when="2002" year="2002">2002</date><idno type="doi">10.1007/3-540-36383-1_7</idno><idno type="url">https://api.istex.fr/document/DBC30EF32B09EE3E8F8FF41251217F91E1C6AC9D/fulltext/pdf</idno><idno type="wicri:Area/Istex/Corpus">000E93</idno><idno type="wicri:explorRef" wicri:stream="Istex" wicri:step="Corpus" wicri:corpus="ISTEX">000E93</idno><idno type="wicri:Area/Istex/Curation">000D83</idno><idno type="wicri:Area/Istex/Checkpoint">000B73</idno><idno type="wicri:explorRef" wicri:stream="Istex" wicri:step="Checkpoint">000B73</idno><idno type="wicri:doubleKey">0302-9743:2002:Meinel C:algorithms:and:heuristics</idno><idno type="wicri:Area/Main/Merge">001F13</idno><idno type="wicri:source">INIST</idno><idno type="RBID">Pascal:03-0184306</idno><idno type="wicri:Area/PascalFrancis/Corpus">000C74</idno><idno type="wicri:Area/PascalFrancis/Curation">000241</idno><idno type="wicri:Area/PascalFrancis/Checkpoint">000B26</idno><idno type="wicri:explorRef" wicri:stream="PascalFrancis" wicri:step="Checkpoint">000B26</idno><idno type="wicri:doubleKey">0302-9743:2002:Meinel C:algorithms:and:heuristics</idno><idno type="wicri:Area/Main/Merge">001F91</idno><idno type="wicri:Area/Main/Curation">001C64</idno><idno type="wicri:Area/Main/Exploration">001C64</idno></publicationStmt><sourceDesc><biblStruct><analytic><title level="a" type="main" xml:lang="en">Algorithms and Heuristics in VLSI Design</title><author><name sortKey="Meinel, Christoph" sort="Meinel, Christoph" uniqKey="Meinel C" first="Christoph" last="Meinel">Christoph Meinel</name><affiliation wicri:level="4"><country xml:lang="fr">Allemagne</country><wicri:regionArea>Department of Computer Science, University of Trier, Trier</wicri:regionArea><orgName type="university">Université de Trèves</orgName><placeName><settlement type="city">Trèves (Allemagne)</settlement><region type="land" nuts="1">Rhénanie-Palatinat</region></placeName><placeName><settlement type="city">Trèves (Allemagne)</settlement><region type="land" nuts="1">Rhénanie-Palatinat</region></placeName><orgName type="university">Université de Trèves</orgName></affiliation><affiliation wicri:level="1"><country wicri:rule="url">Allemagne</country><placeName><settlement type="city">Trèves (Allemagne)</settlement><region type="land" nuts="1">Rhénanie-Palatinat</region></placeName><orgName type="university">Université de Trèves</orgName></affiliation></author><author><name sortKey="Stangier, Christian" sort="Stangier, Christian" uniqKey="Stangier C" first="Christian" last="Stangier">Christian Stangier</name><affiliation wicri:level="4"><country xml:lang="fr">Allemagne</country><wicri:regionArea>Department of Computer Science, University of Trier, Trier</wicri:regionArea><orgName type="university">Université de Trèves</orgName><placeName><settlement type="city">Trèves (Allemagne)</settlement><region type="land" nuts="1">Rhénanie-Palatinat</region></placeName></affiliation><affiliation wicri:level="1"><country wicri:rule="url">Allemagne</country></affiliation></author></analytic><monogr></monogr><series><title level="s">Lecture Notes in Computer Science</title><imprint><date>2002</date></imprint><idno type="ISSN">0302-9743</idno><idno type="ISSN">0302-9743</idno></series><idno type="istex">DBC30EF32B09EE3E8F8FF41251217F91E1C6AC9D</idno><idno type="DOI">10.1007/3-540-36383-1_7</idno><idno type="ChapterID">7</idno><idno type="ChapterID">Chap7</idno></biblStruct></sourceDesc><seriesStmt><idno type="ISSN">0302-9743</idno></seriesStmt></fileDesc><profileDesc><textClass><keywords scheme="KwdEn" xml:lang="en"><term>Binary decision diagram</term><term>Circuit design</term><term>Formal verification</term><term>Heuristic method</term><term>Reachability analysis</term><term>VLSI circuit</term></keywords><keywords scheme="Pascal" xml:lang="fr"><term>Analyse atteignabilité</term><term>Circuit VLSI</term><term>Conception circuit</term><term>Diagramme binaire décision</term><term>Méthode heuristique</term><term>Vérification formelle</term></keywords></textClass><langUsage><language ident="en">en</language></langUsage></profileDesc></teiHeader><front><div type="abstract" xml:lang="en">Abstract: The increasing complexity of nowadays VLSI designs makes it hard up to impossible to check their correctness by using validation methods like simulation. Therefore there is is a growing demand for formal verification methods in VLSI design and verification.</div></front></TEI><affiliations><list><country><li>Allemagne</li></country><region><li>Rhénanie-Palatinat</li></region><settlement><li>Trèves (Allemagne)</li></settlement><orgName><li>Université de Trèves</li></orgName></list><tree><country name="Allemagne"><region name="Rhénanie-Palatinat"><name sortKey="Meinel, Christoph" sort="Meinel, Christoph" uniqKey="Meinel C" first="Christoph" last="Meinel">Christoph Meinel</name></region><name sortKey="Meinel, Christoph" sort="Meinel, Christoph" uniqKey="Meinel C" first="Christoph" last="Meinel">Christoph Meinel</name><name sortKey="Stangier, Christian" sort="Stangier, Christian" uniqKey="Stangier C" first="Christian" last="Stangier">Christian Stangier</name><name sortKey="Stangier, Christian" sort="Stangier, Christian" uniqKey="Stangier C" first="Christian" last="Stangier">Christian Stangier</name></country></tree></affiliations></record>Pour manipuler ce document sous Unix (Dilib)
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