UnivTrevesV1, Istex, Corpus, bibRecord, 000E93

Algorithms and Heuristics in VLSI Design

Identifieur interne : 000E93 ( Istex/Corpus ); précédent : 000E92; suivant : 000E94

Algorithms and Heuristics in VLSI Design

Auteurs : Christoph Meinel ; Christian Stangier

Source :

Lecture Notes in Computer Science [ 0302-9743 ] ; 2002.

RBID : ISTEX:DBC30EF32B09EE3E8F8FF41251217F91E1C6AC9D

Abstract

Abstract: The increasing complexity of nowadays VLSI designs makes it hard up to impossible to check their correctness by using validation methods like simulation. Therefore there is is a growing demand for formal verification methods in VLSI design and verification.

Url:

https://api.istex.fr/document/DBC30EF32B09EE3E8F8FF41251217F91E1C6AC9D/fulltext/pdf

DOI: 10.1007/3-540-36383-1_7

Links to Exploration step

ISTEX:DBC30EF32B09EE3E8F8FF41251217F91E1C6AC9D

Le document en format XML

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Algorithms and Heuristics in VLSI Design

Algorithms and Heuristics in VLSI Design

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