UnivTrevesV1, PascalFrancis, Corpus, bibRecord, 000C74

Algorithms and heuristics in VLSI design

Identifieur interne : 000C74 ( PascalFrancis/Corpus ); précédent : 000C73; suivant : 000C75

Algorithms and heuristics in VLSI design

Auteurs : Christoph Meinel ; Christian Stangier

Source :

Lecture notes in computer science [ 0302-9743 ] ; 2002.

RBID : Pascal:03-0184306

Descripteurs français

Pascal (Inist)
- Conception circuit, Circuit VLSI, Méthode heuristique, Vérification formelle, Diagramme binaire décision, Analyse atteignabilité.

English descriptors

KwdEn :
- Binary decision diagram, Circuit design, Formal verification, Heuristic method, Reachability analysis, VLSI circuit.

Notice en format standard (ISO 2709)

Pour connaître la documentation sur le format Inist Standard.

A01	`01`	`1`		`@0 0302-9743`
A05				`@2 2547`
A08	`01`	`1`	`ENG`	`@1 Algorithms and heuristics in VLSI design`
A09	`01`	`1`	`ENG`	`@1 Experimental algorithmics : from algorithm design to robust and efficient software : Dagstuhl, September 2000`
A11	`01`	`1`		`@1 MEINEL (Christoph)`
A11	`02`	`1`		`@1 STANGIER (Christian)`
A12	`01`	`1`		`@1 FLEISCHER (Rudolf) @9 ed.`
A12	`02`	`1`		`@1 MORET (Bernard) @9 ed.`
A12	`03`	`1`		`@1 MEINECHE SCHMIDT (Erik) @9 ed.`
A14	`01`			`@1 University of Trier, Department of Computer Science @2 Trier @3 DEU @Z 1 aut. @Z 2 aut.`
A20				`@1 139-162`
A21				`@1 2002`
A23	`01`			`@0 ENG`
A26	`01`			`@0 3-540-00346-0`
A43	`01`			`@1 INIST @2 16343 @5 354000108493890070`
A44				`@0 0000 @1 © 2003 INIST-CNRS. All rights reserved.`
A45				`@0 35 ref.`
A47	`01`	`1`		`@0 03-0184306`
A60				`@1 P @2 C`
A61				`@0 A`
A64	`01`	`1`		`@0 Lecture notes in computer science`
A66	`01`			`@0 DEU`
C02	`01`	`X`		`@0 001D03F06B`
C02	`02`	`X`		`@0 001D02A05`
C03	`01`	`X`	`FRE`	`@0 Conception circuit @5 03`
C03	`01`	`X`	`ENG`	`@0 Circuit design @5 03`
C03	`01`	`X`	`SPA`	`@0 Diseño circuito @5 03`
C03	`02`	`X`	`FRE`	`@0 Circuit VLSI @5 04`
C03	`02`	`X`	`ENG`	`@0 VLSI circuit @5 04`
C03	`02`	`X`	`SPA`	`@0 Circuito VLSI @5 04`
C03	`03`	`X`	`FRE`	`@0 Méthode heuristique @5 05`
C03	`03`	`X`	`ENG`	`@0 Heuristic method @5 05`
C03	`03`	`X`	`SPA`	`@0 Método heurístico @5 05`
C03	`04`	`3`	`FRE`	`@0 Vérification formelle @5 06`
C03	`04`	`3`	`ENG`	`@0 Formal verification @5 06`
C03	`05`	`X`	`FRE`	`@0 Diagramme binaire décision @5 07`
C03	`05`	`X`	`ENG`	`@0 Binary decision diagram @5 07`
C03	`05`	`X`	`SPA`	`@0 Diagrama binaria decisión @5 07`
C03	`06`	`3`	`FRE`	`@0 Analyse atteignabilité @5 08`
C03	`06`	`3`	`ENG`	`@0 Reachability analysis @5 08`
N21				`@1 104`
N82				`@1 PSI`

A30	`01`	`1`	`ENG`	`@1 Schloss Dagstuhl seminar on experimental algorithmics @2 1 @3 Dagstuhl DEU @4 2000-09`

Format Inist (serveur)

NO :	PASCAL 03-0184306 INIST
ET :	Algorithms and heuristics in VLSI design
AU :	MEINEL (Christoph); STANGIER (Christian); FLEISCHER (Rudolf); MORET (Bernard); MEINECHE SCHMIDT (Erik)
AF :	University of Trier, Department of Computer Science/Trier/Allemagne (1 aut., 2 aut.)
DT :	Publication en série; Congrès; Niveau analytique
SO :	Lecture notes in computer science; ISSN 0302-9743; Allemagne; Da. 2002; Vol. 2547; Pp. 139-162; Bibl. 35 ref.
LA :	Anglais
CC :	001D03F06B; 001D02A05
FD :	Conception circuit; Circuit VLSI; Méthode heuristique; Vérification formelle; Diagramme binaire décision; Analyse atteignabilité
ED :	Circuit design; VLSI circuit; Heuristic method; Formal verification; Binary decision diagram; Reachability analysis
SD :	Diseño circuito; Circuito VLSI; Método heurístico; Diagrama binaria decisión
LO :	INIST-16343.354000108493890070
ID :	03-0184306

Links to Exploration step

Pascal:03-0184306

Le document en format XML

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Algorithms and heuristics in VLSI design

Algorithms and heuristics in VLSI design

Source :

Descripteurs français

English descriptors

Notice en format standard (ISO 2709)

Format Inist (serveur)

Links to Exploration step

Le document en format XML

Pour manipuler ce document sous Unix (Dilib)

Pour mettre un lien sur cette page dans le réseau Wicri