A Dual Slope Charge Sampling Analog Front-End for a Wireless Neural Recording System
Identifieur interne : 000B72 ( Main/Curation ); précédent : 000B71; suivant : 000B73A Dual Slope Charge Sampling Analog Front-End for a Wireless Neural Recording System
Auteurs : Seung Bae Lee ; Byunghun Lee ; Benoit Gosselin ; Maysam GhovanlooSource :
- Conference proceedings : ... Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Annual Conference [ 1557-170X ] ; 2014.
Abstract
This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-µm CMOS process, occupying 2.4 × 2.1 mm2 and consuming 255 µW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 µVrms in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 µW.
Url:
DOI: 10.1109/EMBC.2014.6944287
PubMed: 25570655
PubMed Central: 4445086
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