Resistance switching properties of solgel derived SrZrO3 based memory thin films
Identifieur interne : 001518 ( Main/Curation ); précédent : 001517; suivant : 001519Resistance switching properties of solgel derived SrZrO3 based memory thin films
Auteurs : Chih-Yi Liu [Taïwan] ; Tseung-Yuen Tseng [Taïwan]Source :
- Journal of Physics D: Applied Physics [ 0022-3727 ] ; 2007.
English descriptors
- KwdEn :
- Abrupt resistance, Access memory, Appl, Behaviour, Bias voltage, Conduction mechanisms, Decay behaviours, Density increases, Device resistance, Electrical behaviours, Experimental data, Gure, Iedm tech, Ieee electron devices lett, Leakage, Lett, Memory application, Memory applications, Metal mask, Metallic elements, Negative bias voltage, Negative voltage stress, Nonvolatile, Nonvolatile memory, Nonvolatile memory application, Ohmic conduction, Other researchers, Other words, Oxygen vacancies, Phys, Positive bias voltage, Positive voltage, Power supply, Pulse, Pulse number, Pulse width, Reproducible resistance, Resistance ratio, Reversible resistance, Schottky emission, Size effect, Smaller pulse width, Srzro3, Stress time, Tseng, Various pulse widths, Voltage pulse, Voltage pulse number, Voltage pulses, Voltage stress, Voltage sweep.
- Teeft :
- Abrupt resistance, Access memory, Appl, Behaviour, Bias voltage, Conduction mechanisms, Decay behaviours, Density increases, Device resistance, Electrical behaviours, Experimental data, Gure, Iedm tech, Ieee electron devices lett, Leakage, Lett, Memory application, Memory applications, Metal mask, Metallic elements, Negative bias voltage, Negative voltage stress, Nonvolatile, Nonvolatile memory, Nonvolatile memory application, Ohmic conduction, Other researchers, Other words, Oxygen vacancies, Phys, Positive bias voltage, Positive voltage, Power supply, Pulse, Pulse number, Pulse width, Reproducible resistance, Resistance ratio, Reversible resistance, Schottky emission, Size effect, Smaller pulse width, Srzro3, Stress time, Tseng, Various pulse widths, Voltage pulse, Voltage pulse number, Voltage pulses, Voltage stress, Voltage sweep.
Abstract
Solgel derived SrZrO3 based metal/insulator/metal (MIM) devices were fabricated to study their reversible resistance switching properties operated by dc voltage sweep and voltage pulses. The leakage-state of the device is changed from the original-state and finally switched between the high leakage-state (H-state) and the low leakage-state (L-state). The resistance ratio between the H-state and the L-state is about 104, and the leakage-states are not changed without power supply, which is suitable for nonvolatile memory application. The conduction mechanisms of the original-state, the H-state and the L-state obey Schottky emission, FrenkelPoole emission and Ohmic conduction, respectively. The first device resistance switching, called the forming process, changed from the original-state to the H-state. The switching time from the H-state to the L-state is much longer than that from the L-state to the H-state and that of the forming process. The decay behaviours of leakage current after resistance switching are influenced by pulse width and voltage stress directions. The switching time can be accumulated to switch the device from the H-state to the L-state, which could be a guide to multi-level memory applications. The model of conducting paths can well explain the electrical behaviours of our resistance switching devices.
Url:
DOI: 10.1088/0022-3727/40/7/045
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Phys. D: Appl. Phys.</title><idno type="ISSN">0022-3727</idno><idno type="eISSN">1361-6463</idno><imprint><publisher>IOP Publishing</publisher><date type="published" when="2007">2007</date><biblScope unit="volume">40</biblScope><biblScope unit="issue">7</biblScope><biblScope unit="page" from="2157">2157</biblScope><biblScope unit="page" to="2161">2161</biblScope><biblScope unit="production">Printed in the UK</biblScope></imprint><idno type="ISSN">0022-3727</idno></series></biblStruct></sourceDesc><seriesStmt><idno type="ISSN">0022-3727</idno></seriesStmt></fileDesc><profileDesc><textClass><keywords scheme="KwdEn" xml:lang="en"><term>Abrupt resistance</term><term>Access memory</term><term>Appl</term><term>Behaviour</term><term>Bias voltage</term><term>Conduction mechanisms</term><term>Decay behaviours</term><term>Density increases</term><term>Device resistance</term><term>Electrical behaviours</term><term>Experimental data</term><term>Gure</term><term>Iedm tech</term><term>Ieee electron devices lett</term><term>Leakage</term><term>Lett</term><term>Memory application</term><term>Memory applications</term><term>Metal mask</term><term>Metallic elements</term><term>Negative bias voltage</term><term>Negative voltage stress</term><term>Nonvolatile</term><term>Nonvolatile memory</term><term>Nonvolatile memory application</term><term>Ohmic conduction</term><term>Other researchers</term><term>Other words</term><term>Oxygen vacancies</term><term>Phys</term><term>Positive bias voltage</term><term>Positive voltage</term><term>Power supply</term><term>Pulse</term><term>Pulse number</term><term>Pulse width</term><term>Reproducible resistance</term><term>Resistance ratio</term><term>Reversible resistance</term><term>Schottky emission</term><term>Size effect</term><term>Smaller pulse width</term><term>Srzro3</term><term>Stress time</term><term>Tseng</term><term>Various pulse widths</term><term>Voltage pulse</term><term>Voltage pulse number</term><term>Voltage pulses</term><term>Voltage stress</term><term>Voltage sweep</term></keywords><keywords scheme="Teeft" xml:lang="en"><term>Abrupt resistance</term><term>Access memory</term><term>Appl</term><term>Behaviour</term><term>Bias voltage</term><term>Conduction mechanisms</term><term>Decay behaviours</term><term>Density increases</term><term>Device resistance</term><term>Electrical behaviours</term><term>Experimental data</term><term>Gure</term><term>Iedm tech</term><term>Ieee electron devices lett</term><term>Leakage</term><term>Lett</term><term>Memory application</term><term>Memory applications</term><term>Metal mask</term><term>Metallic elements</term><term>Negative bias voltage</term><term>Negative voltage stress</term><term>Nonvolatile</term><term>Nonvolatile memory</term><term>Nonvolatile memory application</term><term>Ohmic conduction</term><term>Other researchers</term><term>Other words</term><term>Oxygen vacancies</term><term>Phys</term><term>Positive bias voltage</term><term>Positive voltage</term><term>Power supply</term><term>Pulse</term><term>Pulse number</term><term>Pulse width</term><term>Reproducible resistance</term><term>Resistance ratio</term><term>Reversible resistance</term><term>Schottky emission</term><term>Size effect</term><term>Smaller pulse width</term><term>Srzro3</term><term>Stress time</term><term>Tseng</term><term>Various pulse widths</term><term>Voltage pulse</term><term>Voltage pulse number</term><term>Voltage pulses</term><term>Voltage stress</term><term>Voltage sweep</term></keywords></textClass><langUsage><language ident="en">en</language></langUsage></profileDesc></teiHeader><front><div type="abstract">Solgel derived SrZrO3 based metal/insulator/metal (MIM) devices were fabricated to study their reversible resistance switching properties operated by dc voltage sweep and voltage pulses. The leakage-state of the device is changed from the original-state and finally switched between the high leakage-state (H-state) and the low leakage-state (L-state). The resistance ratio between the H-state and the L-state is about 104, and the leakage-states are not changed without power supply, which is suitable for nonvolatile memory application. The conduction mechanisms of the original-state, the H-state and the L-state obey Schottky emission, FrenkelPoole emission and Ohmic conduction, respectively. The first device resistance switching, called the forming process, changed from the original-state to the H-state. The switching time from the H-state to the L-state is much longer than that from the L-state to the H-state and that of the forming process. The decay behaviours of leakage current after resistance switching are influenced by pulse width and voltage stress directions. The switching time can be accumulated to switch the device from the H-state to the L-state, which could be a guide to multi-level memory applications. The model of conducting paths can well explain the electrical behaviours of our resistance switching devices.</div></front></TEI></record>Pour manipuler ce document sous Unix (Dilib)
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