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Hardware Realization of Krawtchouk Transform Utilizing VHDL Modeling

Identifieur interne : 001D37 ( Crin/Corpus ); précédent : 001D36; suivant : 001D38

Hardware Realization of Krawtchouk Transform Utilizing VHDL Modeling

Auteurs : N. Botros ; J. Yang ; Philip Feinsilver ; René Schott

Source :

RBID : CRIN:botros97a

English descriptors

Abstract

In this paper we present a simplification of Krawtchouk transform and its hardware realization on a Xilinx FPGA. A brief contrast between this hardware and that of Fourier Transform is presented The hardware is tested by inputting data through a CAD programs and reading the results of the transform from the RAM of the hardware. These results those calculated by software programs for the same input data. The hardware is stand-alone and operates on a real-time basis.

Links to Exploration step

CRIN:botros97a

Le document en format XML

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<title xml:lang="en" wicri:score="400">Hardware Realization of Krawtchouk Transform Utilizing VHDL Modeling</title>
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<idno type="RBID">CRIN:botros97a</idno>
<date when="1997" year="1997">1997</date>
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<title xml:lang="en">Hardware Realization of Krawtchouk Transform Utilizing VHDL Modeling</title>
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<name sortKey="Yang, J" sort="Yang, J" uniqKey="Yang J" first="J." last="Yang">J. Yang</name>
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<name sortKey="Feinsilver, Philip" sort="Feinsilver, Philip" uniqKey="Feinsilver P" first="Philip" last="Feinsilver">Philip Feinsilver</name>
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<name sortKey="Schott, Rene" sort="Schott, Rene" uniqKey="Schott R" first="René" last="Schott">René Schott</name>
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<term>VHDL modeling</term>
<term>hardware realization</term>
<term>krawtchouk transform</term>
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<front>
<div type="abstract" xml:lang="en" wicri:score="571">In this paper we present a simplification of Krawtchouk transform and its hardware realization on a Xilinx FPGA. A brief contrast between this hardware and that of Fourier Transform is presented The hardware is tested by inputting data through a CAD programs and reading the results of the transform from the RAM of the hardware. These results those calculated by software programs for the same input data. The hardware is stand-alone and operates on a real-time basis.</div>
</front>
</TEI>
<BibTex type="inproceedings">
<ref>botros97a</ref>
<crinnumber>97-R-078</crinnumber>
<category>3</category>
<equipe>AMII</equipe>
<author>
<e>Botros, N.</e>
<e>Yang, J.</e>
<e>Feinsilver, Philip</e>
<e>Schott, René</e>
</author>
<title>Hardware Realization of Krawtchouk Transform Utilizing VHDL Modeling</title>
<booktitle>{IEEE Instrumentation and Measurement Technology Conference, Ottawa, Canada}</booktitle>
<year>1997</year>
<pages>172-177</pages>
<month>may</month>
<publisher>IEEE Pub.</publisher>
<keywords>
<e>krawtchouk transform</e>
<e>hardware realization</e>
<e>VHDL modeling</e>
</keywords>
<abstract>In this paper we present a simplification of Krawtchouk transform and its hardware realization on a Xilinx FPGA. A brief contrast between this hardware and that of Fourier Transform is presented The hardware is tested by inputting data through a CAD programs and reading the results of the transform from the RAM of the hardware. These results those calculated by software programs for the same input data. The hardware is stand-alone and operates on a real-time basis.</abstract>
</BibTex>
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