PSnAP: Accurate Synthetic Address Streams through Memory Profiles
Identifieur interne : 000661 ( Istex/Corpus ); précédent : 000660; suivant : 000662PSnAP: Accurate Synthetic Address Streams through Memory Profiles
Auteurs : Mills Olschanowsky ; M. Tikir ; Laura Carrington ; Allan SnavelySource :
- Lecture Notes in Computer Science [ 0302-9743 ] ; 2010.
Abstract
Abstract: Memory address traces are an important information source; they drive memory simulations for performance modeling, systems design and application tuning. For long running applications, the direct use of an address trace is complicated by its size. Previous attempts to reduce trace size incurred a substantial penalty with respect to trace accuracy. We propose a novel method of memory profiling that enables the generation of highly accurate synthetic traces with space requirements typically under 1% of the original traces. We demonstrate the synthetic trace accuracy in terms of cache hit rates, spatial-temporal locality scores and locality surfaces. Simulated cache hit rates from synthetic traces are within 3.5% of observed and on average are within 1.0% for L1 cache. Our profiles are on average 60 times smaller than compressed traces. The combination of small profile sizes and high similarity to original traces makes our technique uniquely applicable to performance modeling and trace driven simulation of large-scale parallel scientific applications.
Url:
DOI: 10.1007/978-3-642-13374-9_24
Links to Exploration step
ISTEX:B0EF03875545F368427F1A078BD79FB79F1A7AE2Le document en format XML
<record><TEI wicri:istexFullTextTei="biblStruct"><teiHeader><fileDesc><titleStmt><title xml:lang="en">PSnAP: Accurate Synthetic Address Streams through Memory Profiles</title>
<author><name sortKey="Olschanowsky, Mills" sort="Olschanowsky, Mills" uniqKey="Olschanowsky M" first="Mills" last="Olschanowsky">Mills Olschanowsky</name>
<affiliation><mods:affiliation>Department of Computer Science and Engineering, University of California at San Diego</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: crmills@cs.ucsd.edu</mods:affiliation>
</affiliation>
</author>
<author><name sortKey="Tikir, M" sort="Tikir, M" uniqKey="Tikir M" first="M." last="Tikir">M. Tikir</name>
<affiliation><mods:affiliation>San Diego Supercomputer Center</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: mtikir@sdsc.edu</mods:affiliation>
</affiliation>
</author>
<author><name sortKey="Carrington, Laura" sort="Carrington, Laura" uniqKey="Carrington L" first="Laura" last="Carrington">Laura Carrington</name>
<affiliation><mods:affiliation>San Diego Supercomputer Center</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: lcarring@sdsc.edu</mods:affiliation>
</affiliation>
</author>
<author><name sortKey="Snavely, Allan" sort="Snavely, Allan" uniqKey="Snavely A" first="Allan" last="Snavely">Allan Snavely</name>
<affiliation><mods:affiliation>Department of Computer Science and Engineering, University of California at San Diego</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>San Diego Supercomputer Center</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: allans@cs.ucsd.edu</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: allans@sdsc.edu</mods:affiliation>
</affiliation>
</author>
</titleStmt>
<publicationStmt><idno type="wicri:source">ISTEX</idno>
<idno type="RBID">ISTEX:B0EF03875545F368427F1A078BD79FB79F1A7AE2</idno>
<date when="2010" year="2010">2010</date>
<idno type="doi">10.1007/978-3-642-13374-9_24</idno>
<idno type="url">https://api.istex.fr/document/B0EF03875545F368427F1A078BD79FB79F1A7AE2/fulltext/pdf</idno>
<idno type="wicri:Area/Istex/Corpus">000661</idno>
</publicationStmt>
<sourceDesc><biblStruct><analytic><title level="a" type="main" xml:lang="en">PSnAP: Accurate Synthetic Address Streams through Memory Profiles</title>
<author><name sortKey="Olschanowsky, Mills" sort="Olschanowsky, Mills" uniqKey="Olschanowsky M" first="Mills" last="Olschanowsky">Mills Olschanowsky</name>
<affiliation><mods:affiliation>Department of Computer Science and Engineering, University of California at San Diego</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: crmills@cs.ucsd.edu</mods:affiliation>
</affiliation>
</author>
<author><name sortKey="Tikir, M" sort="Tikir, M" uniqKey="Tikir M" first="M." last="Tikir">M. Tikir</name>
<affiliation><mods:affiliation>San Diego Supercomputer Center</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: mtikir@sdsc.edu</mods:affiliation>
</affiliation>
</author>
<author><name sortKey="Carrington, Laura" sort="Carrington, Laura" uniqKey="Carrington L" first="Laura" last="Carrington">Laura Carrington</name>
<affiliation><mods:affiliation>San Diego Supercomputer Center</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: lcarring@sdsc.edu</mods:affiliation>
</affiliation>
</author>
<author><name sortKey="Snavely, Allan" sort="Snavely, Allan" uniqKey="Snavely A" first="Allan" last="Snavely">Allan Snavely</name>
<affiliation><mods:affiliation>Department of Computer Science and Engineering, University of California at San Diego</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>San Diego Supercomputer Center</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: allans@cs.ucsd.edu</mods:affiliation>
</affiliation>
<affiliation><mods:affiliation>E-mail: allans@sdsc.edu</mods:affiliation>
</affiliation>
</author>
</analytic>
<monogr></monogr>
<series><title level="s">Lecture Notes in Computer Science</title>
<imprint><date>2010</date>
</imprint>
<idno type="ISSN">0302-9743</idno>
<idno type="eISSN">1611-3349</idno>
<idno type="ISSN">0302-9743</idno>
</series>
<idno type="istex">B0EF03875545F368427F1A078BD79FB79F1A7AE2</idno>
<idno type="DOI">10.1007/978-3-642-13374-9_24</idno>
<idno type="ChapterID">24</idno>
<idno type="ChapterID">Chap24</idno>
</biblStruct>
</sourceDesc>
<seriesStmt><idno type="ISSN">0302-9743</idno>
</seriesStmt>
</fileDesc>
<profileDesc><textClass></textClass>
<langUsage><language ident="en">en</language>
</langUsage>
</profileDesc>
</teiHeader>
<front><div type="abstract" xml:lang="en">Abstract: Memory address traces are an important information source; they drive memory simulations for performance modeling, systems design and application tuning. For long running applications, the direct use of an address trace is complicated by its size. Previous attempts to reduce trace size incurred a substantial penalty with respect to trace accuracy. We propose a novel method of memory profiling that enables the generation of highly accurate synthetic traces with space requirements typically under 1% of the original traces. We demonstrate the synthetic trace accuracy in terms of cache hit rates, spatial-temporal locality scores and locality surfaces. Simulated cache hit rates from synthetic traces are within 3.5% of observed and on average are within 1.0% for L1 cache. Our profiles are on average 60 times smaller than compressed traces. The combination of small profile sizes and high similarity to original traces makes our technique uniquely applicable to performance modeling and trace driven simulation of large-scale parallel scientific applications.</div>
</front>
</TEI>
<istex><corpusName>springer</corpusName>
<author><json:item><name>Catherine Mills Olschanowsky</name>
<affiliations><json:string>Department of Computer Science and Engineering, University of California at San Diego,</json:string>
<json:string>E-mail: crmills@cs.ucsd.edu</json:string>
</affiliations>
</json:item>
<json:item><name>Mustafa M. Tikir</name>
<affiliations><json:string>San Diego Supercomputer Center,</json:string>
<json:string>E-mail: mtikir@sdsc.edu</json:string>
</affiliations>
</json:item>
<json:item><name>Laura Carrington</name>
<affiliations><json:string>San Diego Supercomputer Center,</json:string>
<json:string>E-mail: lcarring@sdsc.edu</json:string>
</affiliations>
</json:item>
<json:item><name>Allan Snavely</name>
<affiliations><json:string>Department of Computer Science and Engineering, University of California at San Diego,</json:string>
<json:string>San Diego Supercomputer Center,</json:string>
<json:string>E-mail: allans@cs.ucsd.edu</json:string>
<json:string>E-mail: allans@sdsc.edu</json:string>
</affiliations>
</json:item>
</author>
<language><json:string>eng</json:string>
</language>
<originalGenre><json:string>OriginalPaper</json:string>
</originalGenre>
<abstract>Abstract: Memory address traces are an important information source; they drive memory simulations for performance modeling, systems design and application tuning. For long running applications, the direct use of an address trace is complicated by its size. Previous attempts to reduce trace size incurred a substantial penalty with respect to trace accuracy. We propose a novel method of memory profiling that enables the generation of highly accurate synthetic traces with space requirements typically under 1% of the original traces. We demonstrate the synthetic trace accuracy in terms of cache hit rates, spatial-temporal locality scores and locality surfaces. Simulated cache hit rates from synthetic traces are within 3.5% of observed and on average are within 1.0% for L1 cache. Our profiles are on average 60 times smaller than compressed traces. The combination of small profile sizes and high similarity to original traces makes our technique uniquely applicable to performance modeling and trace driven simulation of large-scale parallel scientific applications.</abstract>
<qualityIndicators><score>8.396</score>
<pdfVersion>1.6</pdfVersion>
<pdfPageSize>430 x 660 pts</pdfPageSize>
<refBibsNative>false</refBibsNative>
<keywordCount>0</keywordCount>
<abstractCharCount>1074</abstractCharCount>
<pdfWordCount>5408</pdfWordCount>
<pdfCharCount>32681</pdfCharCount>
<pdfPageCount>15</pdfPageCount>
<abstractWordCount>158</abstractWordCount>
</qualityIndicators>
<title>PSnAP: Accurate Synthetic Address Streams through Memory Profiles</title>
<chapterId><json:string>24</json:string>
<json:string>Chap24</json:string>
</chapterId>
<genre><json:string>conference</json:string>
</genre>
<serie><editor><json:item><name>David Hutchison</name>
<affiliations><json:string>Lancaster University, Lancaster, UK</json:string>
</affiliations>
</json:item>
<json:item><name>Takeo Kanade</name>
<affiliations><json:string>Carnegie Mellon University, Pittsburgh, PA, USA</json:string>
</affiliations>
</json:item>
<json:item><name>Josef Kittler</name>
<affiliations><json:string>University of Surrey, Guildford, UK</json:string>
</affiliations>
</json:item>
<json:item><name>Jon M. Kleinberg</name>
<affiliations><json:string>Cornell University, Ithaca, NY, USA</json:string>
</affiliations>
</json:item>
<json:item><name>Friedemann Mattern</name>
<affiliations><json:string>ETH Zurich, Zurich, Switzerland</json:string>
</affiliations>
</json:item>
<json:item><name>John C. Mitchell</name>
<affiliations><json:string>Stanford University, Stanford, CA, USA</json:string>
</affiliations>
</json:item>
<json:item><name>Moni Naor</name>
<affiliations><json:string>Weizmann Institute of Science, Rehovot, Israel</json:string>
</affiliations>
</json:item>
<json:item><name>Oscar Nierstrasz</name>
<affiliations><json:string>University of Bern, Bern, Switzerland</json:string>
</affiliations>
</json:item>
<json:item><name>C. Pandu Rangan</name>
<affiliations><json:string>Indian Institute of Technology, Madras, India</json:string>
</affiliations>
</json:item>
<json:item><name>Bernhard Steffen</name>
<affiliations><json:string>University of Dortmund, Dortmund, Germany</json:string>
</affiliations>
</json:item>
<json:item><name>Madhu Sudan</name>
<affiliations><json:string>Massachusetts Institute of Technology, MA, USA</json:string>
</affiliations>
</json:item>
<json:item><name>Demetri Terzopoulos</name>
<affiliations><json:string>University of California, Los Angeles, CA, USA</json:string>
</affiliations>
</json:item>
<json:item><name>Doug Tygar</name>
<affiliations><json:string>University of California, Berkeley, CA, USA</json:string>
</affiliations>
</json:item>
<json:item><name>Moshe Y. Vardi</name>
<affiliations><json:string>Rice University, Houston, TX, USA</json:string>
</affiliations>
</json:item>
<json:item><name>Gerhard Weikum</name>
<affiliations><json:string>Max-Planck Institute of Computer Science, Saarbrücken, Germany</json:string>
</affiliations>
</json:item>
</editor>
<issn><json:string>0302-9743</json:string>
</issn>
<language><json:string>unknown</json:string>
</language>
<eissn><json:string>1611-3349</json:string>
</eissn>
<title>Lecture Notes in Computer Science</title>
<copyrightDate>2010</copyrightDate>
</serie>
<host><editor><json:item><name>Guang R. Gao</name>
<affiliations><json:string>Department of Electrical and Computer Engineering, University of Delaware, 19716, Newark, DE, USA</json:string>
<json:string>E-mail: ggao@capsl.udel.edu</json:string>
</affiliations>
</json:item>
<json:item><name>Lori L. Pollock</name>
<affiliations><json:string>Department of Computer and Information Sciences, University of Delaware, 19716, Newark, DE, USA</json:string>
<json:string>E-mail: pollock@cis.udel.edu</json:string>
</affiliations>
</json:item>
<json:item><name>John Cavazos</name>
<affiliations><json:string>Department of Computer and Information Sciences, University of Delaware, 19716, Newark, DE, USA</json:string>
<json:string>E-mail: cavazos@cis.udel.edu</json:string>
</affiliations>
</json:item>
<json:item><name>Xiaoming Li</name>
<affiliations><json:string>Department of Electrical and Computer Engineering, University of Delaware, 19716, Newark, DE, USA</json:string>
<json:string>E-mail: xli@ece.udel.edu</json:string>
</affiliations>
</json:item>
</editor>
<subject><json:item><value>Computer Science</value>
</json:item>
<json:item><value>Computer Science</value>
</json:item>
<json:item><value>Programming Languages, Compilers, Interpreters</value>
</json:item>
<json:item><value>Programming Techniques</value>
</json:item>
<json:item><value>Data Structures</value>
</json:item>
<json:item><value>Computing Methodologies</value>
</json:item>
<json:item><value>Models and Principles</value>
</json:item>
<json:item><value>Computer Communication Networks</value>
</json:item>
</subject>
<isbn><json:string>978-3-642-13373-2</json:string>
</isbn>
<language><json:string>unknown</json:string>
</language>
<eissn><json:string>1611-3349</json:string>
</eissn>
<title>Languages and Compilers for Parallel Computing</title>
<bookId><json:string>978-3-642-13374-9</json:string>
</bookId>
<volume>5898</volume>
<pages><last>367</last>
<first>353</first>
</pages>
<issn><json:string>0302-9743</json:string>
</issn>
<genre><json:string>book-series</json:string>
</genre>
<eisbn><json:string>978-3-642-13374-9</json:string>
</eisbn>
<copyrightDate>2010</copyrightDate>
<doi><json:string>10.1007/978-3-642-13374-9</json:string>
</doi>
</host>
<publicationDate>2010</publicationDate>
<copyrightDate>2010</copyrightDate>
<doi><json:string>10.1007/978-3-642-13374-9_24</json:string>
</doi>
<id>B0EF03875545F368427F1A078BD79FB79F1A7AE2</id>
<score>0.10159926</score>
<fulltext><json:item><original>true</original>
<mimetype>application/pdf</mimetype>
<extension>pdf</extension>
<uri>https://api.istex.fr/document/B0EF03875545F368427F1A078BD79FB79F1A7AE2/fulltext/pdf</uri>
</json:item>
<json:item><original>false</original>
<mimetype>application/zip</mimetype>
<extension>zip</extension>
<uri>https://api.istex.fr/document/B0EF03875545F368427F1A078BD79FB79F1A7AE2/fulltext/zip</uri>
</json:item>
<istex:fulltextTEI uri="https://api.istex.fr/document/B0EF03875545F368427F1A078BD79FB79F1A7AE2/fulltext/tei"><teiHeader><fileDesc><titleStmt><title level="a" type="main" xml:lang="en">PSnAP: Accurate Synthetic Address Streams through Memory Profiles</title>
<respStmt><resp>Références bibliographiques récupérées via GROBID</resp>
<name resp="ISTEX-API">ISTEX-API (INIST-CNRS)</name>
</respStmt>
</titleStmt>
<publicationStmt><authority>ISTEX</authority>
<publisher>Springer Berlin Heidelberg</publisher>
<pubPlace>Berlin, Heidelberg</pubPlace>
<availability><p>Springer-Verlag Berlin Heidelberg, 2010</p>
</availability>
<date>2010</date>
</publicationStmt>
<sourceDesc><biblStruct type="inbook"><analytic><title level="a" type="main" xml:lang="en">PSnAP: Accurate Synthetic Address Streams through Memory Profiles</title>
<author xml:id="author-1"><persName><forename type="first">Catherine</forename>
<surname>Olschanowsky</surname>
</persName>
<email>crmills@cs.ucsd.edu</email>
<affiliation>Department of Computer Science and Engineering, University of California at San Diego,</affiliation>
</author>
<author xml:id="author-2"><persName><forename type="first">Mustafa</forename>
<surname>Tikir</surname>
</persName>
<email>mtikir@sdsc.edu</email>
<affiliation>San Diego Supercomputer Center,</affiliation>
</author>
<author xml:id="author-3"><persName><forename type="first">Laura</forename>
<surname>Carrington</surname>
</persName>
<email>lcarring@sdsc.edu</email>
<affiliation>San Diego Supercomputer Center,</affiliation>
</author>
<author xml:id="author-4"><persName><forename type="first">Allan</forename>
<surname>Snavely</surname>
</persName>
<email>allans@cs.ucsd.edu</email>
<email>allans@sdsc.edu</email>
<affiliation>Department of Computer Science and Engineering, University of California at San Diego,</affiliation>
<affiliation>San Diego Supercomputer Center,</affiliation>
</author>
</analytic>
<monogr><title level="m">Languages and Compilers for Parallel Computing</title>
<title level="m" type="sub">22nd International Workshop, LCPC 2009, Newark, DE, USA, October 8-10, 2009, Revised Selected Papers</title>
<idno type="pISBN">978-3-642-13373-2</idno>
<idno type="eISBN">978-3-642-13374-9</idno>
<idno type="pISSN">0302-9743</idno>
<idno type="eISSN">1611-3349</idno>
<idno type="DOI">10.1007/978-3-642-13374-9</idno>
<idno type="book-ID">978-3-642-13374-9</idno>
<idno type="book-title-ID">211616</idno>
<idno type="book-sequence-number">5898</idno>
<idno type="book-volume-number">5898</idno>
<idno type="book-chapter-count">30</idno>
<editor><persName><forename type="first">Guang</forename>
<forename type="first">R.</forename>
<surname>Gao</surname>
</persName>
<email>ggao@capsl.udel.edu</email>
<affiliation>Department of Electrical and Computer Engineering, University of Delaware, 19716, Newark, DE, USA</affiliation>
</editor>
<editor><persName><forename type="first">Lori</forename>
<forename type="first">L.</forename>
<surname>Pollock</surname>
</persName>
<email>pollock@cis.udel.edu</email>
<affiliation>Department of Computer and Information Sciences, University of Delaware, 19716, Newark, DE, USA</affiliation>
</editor>
<editor><persName><forename type="first">John</forename>
<surname>Cavazos</surname>
</persName>
<email>cavazos@cis.udel.edu</email>
<affiliation>Department of Computer and Information Sciences, University of Delaware, 19716, Newark, DE, USA</affiliation>
</editor>
<editor><persName><forename type="first">Xiaoming</forename>
<surname>Li</surname>
</persName>
<email>xli@ece.udel.edu</email>
<affiliation>Department of Electrical and Computer Engineering, University of Delaware, 19716, Newark, DE, USA</affiliation>
</editor>
<imprint><publisher>Springer Berlin Heidelberg</publisher>
<pubPlace>Berlin, Heidelberg</pubPlace>
<date type="published" when="2010"></date>
<biblScope unit="volume">5898</biblScope>
<biblScope unit="page" from="353">353</biblScope>
<biblScope unit="page" to="367">367</biblScope>
</imprint>
</monogr>
<series><title level="s">Lecture Notes in Computer Science</title>
<editor><persName><forename type="first">David</forename>
<surname>Hutchison</surname>
</persName>
<affiliation>Lancaster University, Lancaster, UK</affiliation>
</editor>
<editor><persName><forename type="first">Takeo</forename>
<surname>Kanade</surname>
</persName>
<affiliation>Carnegie Mellon University, Pittsburgh, PA, USA</affiliation>
</editor>
<editor><persName><forename type="first">Josef</forename>
<surname>Kittler</surname>
</persName>
<affiliation>University of Surrey, Guildford, UK</affiliation>
</editor>
<editor><persName><forename type="first">Jon</forename>
<forename type="first">M.</forename>
<surname>Kleinberg</surname>
</persName>
<affiliation>Cornell University, Ithaca, NY, USA</affiliation>
</editor>
<editor><persName><forename type="first">Friedemann</forename>
<surname>Mattern</surname>
</persName>
<affiliation>ETH Zurich, Zurich, Switzerland</affiliation>
</editor>
<editor><persName><forename type="first">John</forename>
<forename type="first">C.</forename>
<surname>Mitchell</surname>
</persName>
<affiliation>Stanford University, Stanford, CA, USA</affiliation>
</editor>
<editor><persName><forename type="first">Moni</forename>
<surname>Naor</surname>
</persName>
<affiliation>Weizmann Institute of Science, Rehovot, Israel</affiliation>
</editor>
<editor><persName><forename type="first">Oscar</forename>
<surname>Nierstrasz</surname>
</persName>
<affiliation>University of Bern, Bern, Switzerland</affiliation>
</editor>
<editor><persName><forename type="first">C.</forename>
<surname>Pandu Rangan</surname>
</persName>
<affiliation>Indian Institute of Technology, Madras, India</affiliation>
</editor>
<editor><persName><forename type="first">Bernhard</forename>
<surname>Steffen</surname>
</persName>
<affiliation>University of Dortmund, Dortmund, Germany</affiliation>
</editor>
<editor><persName><forename type="first">Madhu</forename>
<surname>Sudan</surname>
</persName>
<affiliation>Massachusetts Institute of Technology, MA, USA</affiliation>
</editor>
<editor><persName><forename type="first">Demetri</forename>
<surname>Terzopoulos</surname>
</persName>
<affiliation>University of California, Los Angeles, CA, USA</affiliation>
</editor>
<editor><persName><forename type="first">Doug</forename>
<surname>Tygar</surname>
</persName>
<affiliation>University of California, Berkeley, CA, USA</affiliation>
</editor>
<editor><persName><forename type="first">Moshe</forename>
<forename type="first">Y.</forename>
<surname>Vardi</surname>
</persName>
<affiliation>Rice University, Houston, TX, USA</affiliation>
</editor>
<editor><persName><forename type="first">Gerhard</forename>
<surname>Weikum</surname>
</persName>
<affiliation>Max-Planck Institute of Computer Science, Saarbrücken, Germany</affiliation>
</editor>
<biblScope><date>2010</date>
</biblScope>
<idno type="pISSN">0302-9743</idno>
<idno type="eISSN">1611-3349</idno>
<idno type="series-Id">558</idno>
</series>
<idno type="istex">B0EF03875545F368427F1A078BD79FB79F1A7AE2</idno>
<idno type="DOI">10.1007/978-3-642-13374-9_24</idno>
<idno type="ChapterID">24</idno>
<idno type="ChapterID">Chap24</idno>
</biblStruct>
</sourceDesc>
</fileDesc>
<profileDesc><creation><date>2010</date>
</creation>
<langUsage><language ident="en">en</language>
</langUsage>
<abstract xml:lang="en"><p>Abstract: Memory address traces are an important information source; they drive memory simulations for performance modeling, systems design and application tuning. For long running applications, the direct use of an address trace is complicated by its size. Previous attempts to reduce trace size incurred a substantial penalty with respect to trace accuracy. We propose a novel method of memory profiling that enables the generation of highly accurate synthetic traces with space requirements typically under 1% of the original traces. We demonstrate the synthetic trace accuracy in terms of cache hit rates, spatial-temporal locality scores and locality surfaces. Simulated cache hit rates from synthetic traces are within 3.5% of observed and on average are within 1.0% for L1 cache. Our profiles are on average 60 times smaller than compressed traces. The combination of small profile sizes and high similarity to original traces makes our technique uniquely applicable to performance modeling and trace driven simulation of large-scale parallel scientific applications.</p>
</abstract>
<textClass><keywords scheme="Book-Subject-Collection"><list><label>SUCO11645</label>
<item><term>Computer Science</term>
</item>
</list>
</keywords>
</textClass>
<textClass><keywords scheme="Book-Subject-Group"><list><label>I</label>
<label>I14037</label>
<label>I14010</label>
<label>I15017</label>
<label>I21009</label>
<label>I18016</label>
<label>I13022</label>
<item><term>Computer Science</term>
</item>
<item><term>Programming Languages, Compilers, Interpreters</term>
</item>
<item><term>Programming Techniques</term>
</item>
<item><term>Data Structures</term>
</item>
<item><term>Computing Methodologies</term>
</item>
<item><term>Models and Principles</term>
</item>
<item><term>Computer Communication Networks</term>
</item>
</list>
</keywords>
</textClass>
</profileDesc>
<revisionDesc><change when="2010">Published</change>
<change xml:id="refBibs-istex" who="#ISTEX-API" when="2016-09-22">References added</change>
</revisionDesc>
</teiHeader>
</istex:fulltextTEI>
<json:item><original>false</original>
<mimetype>text/plain</mimetype>
<extension>txt</extension>
<uri>https://api.istex.fr/document/B0EF03875545F368427F1A078BD79FB79F1A7AE2/fulltext/txt</uri>
</json:item>
</fulltext>
<metadata><istex:metadataXml wicri:clean="Springer, Publisher found" wicri:toSee="no header"><istex:xmlDeclaration>version="1.0" encoding="UTF-8"</istex:xmlDeclaration>
<istex:docType PUBLIC="-//Springer-Verlag//DTD A++ V2.4//EN" URI="http://devel.springer.de/A++/V2.4/DTD/A++V2.4.dtd" name="istex:docType"></istex:docType>
<istex:document><Publisher><PublisherInfo><PublisherName>Springer Berlin Heidelberg</PublisherName>
<PublisherLocation>Berlin, Heidelberg</PublisherLocation>
</PublisherInfo>
<Series><SeriesInfo SeriesType="Series" TocLevels="0"><SeriesID>558</SeriesID>
<SeriesPrintISSN>0302-9743</SeriesPrintISSN>
<SeriesElectronicISSN>1611-3349</SeriesElectronicISSN>
<SeriesTitle Language="En">Lecture Notes in Computer Science</SeriesTitle>
</SeriesInfo>
<SeriesHeader><EditorGroup><Editor AffiliationIDS="Aff1"><EditorName DisplayOrder="Western"><GivenName>David</GivenName>
<FamilyName>Hutchison</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff2"><EditorName DisplayOrder="Western"><GivenName>Takeo</GivenName>
<FamilyName>Kanade</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff3"><EditorName DisplayOrder="Western"><GivenName>Josef</GivenName>
<FamilyName>Kittler</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff4"><EditorName DisplayOrder="Western"><GivenName>Jon</GivenName>
<GivenName>M.</GivenName>
<FamilyName>Kleinberg</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff5"><EditorName DisplayOrder="Western"><GivenName>Friedemann</GivenName>
<FamilyName>Mattern</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff6"><EditorName DisplayOrder="Western"><GivenName>John</GivenName>
<GivenName>C.</GivenName>
<FamilyName>Mitchell</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff7"><EditorName DisplayOrder="Western"><GivenName>Moni</GivenName>
<FamilyName>Naor</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff8"><EditorName DisplayOrder="Western"><GivenName>Oscar</GivenName>
<FamilyName>Nierstrasz</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff9"><EditorName DisplayOrder="Western"><GivenName>C.</GivenName>
<FamilyName>Pandu Rangan</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff10"><EditorName DisplayOrder="Western"><GivenName>Bernhard</GivenName>
<FamilyName>Steffen</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff11"><EditorName DisplayOrder="Western"><GivenName>Madhu</GivenName>
<FamilyName>Sudan</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff12"><EditorName DisplayOrder="Western"><GivenName>Demetri</GivenName>
<FamilyName>Terzopoulos</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff13"><EditorName DisplayOrder="Western"><GivenName>Doug</GivenName>
<FamilyName>Tygar</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff14"><EditorName DisplayOrder="Western"><GivenName>Moshe</GivenName>
<GivenName>Y.</GivenName>
<FamilyName>Vardi</FamilyName>
</EditorName>
</Editor>
<Editor AffiliationIDS="Aff15"><EditorName DisplayOrder="Western"><GivenName>Gerhard</GivenName>
<FamilyName>Weikum</FamilyName>
</EditorName>
</Editor>
<Affiliation ID="Aff1"><OrgName>Lancaster University</OrgName>
<OrgAddress><City>Lancaster</City>
<Country>UK</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff2"><OrgName>Carnegie Mellon University</OrgName>
<OrgAddress><City>Pittsburgh</City>
<State>PA</State>
<Country>USA</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff3"><OrgName>University of Surrey</OrgName>
<OrgAddress><City>Guildford</City>
<Country>UK</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff4"><OrgName>Cornell University</OrgName>
<OrgAddress><City>Ithaca</City>
<State>NY</State>
<Country>USA</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff5"><OrgName>ETH Zurich</OrgName>
<OrgAddress><City>Zurich</City>
<Country>Switzerland</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff6"><OrgName>Stanford University</OrgName>
<OrgAddress><City>Stanford</City>
<State>CA</State>
<Country>USA</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff7"><OrgName>Weizmann Institute of Science</OrgName>
<OrgAddress><City>Rehovot</City>
<Country>Israel</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff8"><OrgName>University of Bern</OrgName>
<OrgAddress><City>Bern</City>
<Country>Switzerland</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff9"><OrgName>Indian Institute of Technology</OrgName>
<OrgAddress><City>Madras</City>
<Country>India</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff10"><OrgName>University of Dortmund</OrgName>
<OrgAddress><City>Dortmund</City>
<Country>Germany</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff11"><OrgName>Massachusetts Institute of Technology</OrgName>
<OrgAddress><State>MA</State>
<Country>USA</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff12"><OrgName>University of California</OrgName>
<OrgAddress><City>Los Angeles</City>
<State>CA</State>
<Country>USA</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff13"><OrgName>University of California</OrgName>
<OrgAddress><City>Berkeley</City>
<State>CA</State>
<Country>USA</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff14"><OrgName>Rice University</OrgName>
<OrgAddress><City>Houston</City>
<State>TX</State>
<Country>USA</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff15"><OrgName>Max-Planck Institute of Computer Science</OrgName>
<OrgAddress><City>Saarbrücken</City>
<Country>Germany</Country>
</OrgAddress>
</Affiliation>
</EditorGroup>
</SeriesHeader>
<Book Language="En"><BookInfo BookProductType="Proceedings" ContainsESM="No" Language="En" MediaType="eBook" NumberingDepth="2" NumberingStyle="ContentOnly" OutputMedium="All" TocLevels="0"><BookID>978-3-642-13374-9</BookID>
<BookTitle>Languages and Compilers for Parallel Computing</BookTitle>
<BookSubTitle>22nd International Workshop, LCPC 2009, Newark, DE, USA, October 8-10, 2009, Revised Selected Papers</BookSubTitle>
<BookVolumeNumber>5898</BookVolumeNumber>
<BookSequenceNumber>5898</BookSequenceNumber>
<BookDOI>10.1007/978-3-642-13374-9</BookDOI>
<BookTitleID>211616</BookTitleID>
<BookPrintISBN>978-3-642-13373-2</BookPrintISBN>
<BookElectronicISBN>978-3-642-13374-9</BookElectronicISBN>
<BookChapterCount>30</BookChapterCount>
<BookCopyright><CopyrightHolderName>Springer-Verlag Berlin Heidelberg</CopyrightHolderName>
<CopyrightYear>2010</CopyrightYear>
</BookCopyright>
<BookSubjectGroup><BookSubject Code="I" Type="Primary">Computer Science</BookSubject>
<BookSubject Code="I14037" Priority="1" Type="Secondary">Programming Languages, Compilers, Interpreters</BookSubject>
<BookSubject Code="I14010" Priority="2" Type="Secondary">Programming Techniques</BookSubject>
<BookSubject Code="I15017" Priority="3" Type="Secondary">Data Structures</BookSubject>
<BookSubject Code="I21009" Priority="4" Type="Secondary">Computing Methodologies</BookSubject>
<BookSubject Code="I18016" Priority="5" Type="Secondary">Models and Principles</BookSubject>
<BookSubject Code="I13022" Priority="6" Type="Secondary">Computer Communication Networks</BookSubject>
<SubjectCollection Code="SUCO11645">Computer Science</SubjectCollection>
</BookSubjectGroup>
<BookContext><SeriesID>558</SeriesID>
</BookContext>
</BookInfo>
<BookHeader><EditorGroup><Editor AffiliationIDS="Aff16"><EditorName DisplayOrder="Western"><GivenName>Guang</GivenName>
<GivenName>R.</GivenName>
<FamilyName>Gao</FamilyName>
</EditorName>
<Contact><Email>ggao@capsl.udel.edu</Email>
</Contact>
</Editor>
<Editor AffiliationIDS="Aff17"><EditorName DisplayOrder="Western"><GivenName>Lori</GivenName>
<GivenName>L.</GivenName>
<FamilyName>Pollock</FamilyName>
</EditorName>
<Contact><Email>pollock@cis.udel.edu</Email>
</Contact>
</Editor>
<Editor AffiliationIDS="Aff17"><EditorName DisplayOrder="Western"><GivenName>John</GivenName>
<FamilyName>Cavazos</FamilyName>
</EditorName>
<Contact><Email>cavazos@cis.udel.edu</Email>
</Contact>
</Editor>
<Editor AffiliationIDS="Aff16"><EditorName DisplayOrder="Western"><GivenName>Xiaoming</GivenName>
<FamilyName>Li</FamilyName>
</EditorName>
<Contact><Email>xli@ece.udel.edu</Email>
</Contact>
</Editor>
<Affiliation ID="Aff16"><OrgDivision>Department of Electrical and Computer Engineering</OrgDivision>
<OrgName>University of Delaware</OrgName>
<OrgAddress><Postcode>19716</Postcode>
<City>Newark</City>
<State>DE</State>
<Country>USA</Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff17"><OrgDivision>Department of Computer and Information Sciences</OrgDivision>
<OrgName>University of Delaware</OrgName>
<OrgAddress><Postcode>19716</Postcode>
<City>Newark</City>
<State>DE</State>
<Country>USA</Country>
</OrgAddress>
</Affiliation>
</EditorGroup>
</BookHeader>
<Chapter ID="Chap24" Language="En"><ChapterInfo ChapterType="OriginalPaper" ContainsESM="No" NumberingDepth="2" NumberingStyle="ContentOnly" TocLevels="0"><ChapterID>24</ChapterID>
<ChapterDOI>10.1007/978-3-642-13374-9_24</ChapterDOI>
<ChapterSequenceNumber>24</ChapterSequenceNumber>
<ChapterTitle Language="En">PSnAP: Accurate Synthetic Address Streams through Memory Profiles</ChapterTitle>
<ChapterFirstPage>353</ChapterFirstPage>
<ChapterLastPage>367</ChapterLastPage>
<ChapterCopyright><CopyrightHolderName>Springer-Verlag Berlin Heidelberg</CopyrightHolderName>
<CopyrightYear>2010</CopyrightYear>
</ChapterCopyright>
<ChapterGrants Type="Regular"><MetadataGrant Grant="OpenAccess"></MetadataGrant>
<AbstractGrant Grant="OpenAccess"></AbstractGrant>
<BodyPDFGrant Grant="Restricted"></BodyPDFGrant>
<BodyHTMLGrant Grant="Restricted"></BodyHTMLGrant>
<BibliographyGrant Grant="Restricted"></BibliographyGrant>
<ESMGrant Grant="Restricted"></ESMGrant>
</ChapterGrants>
<ChapterContext><SeriesID>558</SeriesID>
<BookID>978-3-642-13374-9</BookID>
<BookTitle>Languages and Compilers for Parallel Computing</BookTitle>
</ChapterContext>
</ChapterInfo>
<ChapterHeader><AuthorGroup><Author AffiliationIDS="Aff18"><AuthorName DisplayOrder="Western"><GivenName>Catherine</GivenName>
<GivenName>Mills</GivenName>
<FamilyName>Olschanowsky</FamilyName>
</AuthorName>
<Contact><Email>crmills@cs.ucsd.edu</Email>
</Contact>
</Author>
<Author AffiliationIDS="Aff19"><AuthorName DisplayOrder="Western"><GivenName>Mustafa</GivenName>
<GivenName>M.</GivenName>
<FamilyName>Tikir</FamilyName>
</AuthorName>
<Contact><Email>mtikir@sdsc.edu</Email>
</Contact>
</Author>
<Author AffiliationIDS="Aff19"><AuthorName DisplayOrder="Western"><GivenName>Laura</GivenName>
<FamilyName>Carrington</FamilyName>
</AuthorName>
<Contact><Email>lcarring@sdsc.edu</Email>
</Contact>
</Author>
<Author AffiliationIDS="Aff18 Aff19"><AuthorName DisplayOrder="Western"><GivenName>Allan</GivenName>
<FamilyName>Snavely</FamilyName>
</AuthorName>
<Contact><Email>allans@cs.ucsd.edu</Email>
<Email>allans@sdsc.edu</Email>
</Contact>
</Author>
<Affiliation ID="Aff18"><OrgDivision>Department of Computer Science and Engineering</OrgDivision>
<OrgName>University of California at San Diego</OrgName>
<OrgAddress><Country> </Country>
</OrgAddress>
</Affiliation>
<Affiliation ID="Aff19"><OrgName>San Diego Supercomputer Center</OrgName>
<OrgAddress><Country> </Country>
</OrgAddress>
</Affiliation>
</AuthorGroup>
<Abstract ID="Abs1" Language="En"><Heading>Abstract</Heading>
<Para>Memory address traces are an important information source; they drive memory simulations for performance modeling, systems design and application tuning. For long running applications, the direct use of an address trace is complicated by its size. Previous attempts to reduce trace size incurred a substantial penalty with respect to trace accuracy. We propose a novel method of memory profiling that enables the generation of highly accurate synthetic traces with space requirements typically under 1% of the original traces. We demonstrate the synthetic trace accuracy in terms of cache hit rates, spatial-temporal locality scores and locality surfaces. Simulated cache hit rates from synthetic traces are within 3.5% of observed and on average are within 1.0% for L1 cache. Our profiles are on average 60 times smaller than compressed traces. The combination of small profile sizes and high similarity to original traces makes our technique uniquely applicable to performance modeling and trace driven simulation of large-scale parallel scientific applications.</Para>
</Abstract>
</ChapterHeader>
<NoBody></NoBody>
</Chapter>
</Book>
</Series>
</Publisher>
</istex:document>
</istex:metadataXml>
<mods version="3.6"><titleInfo lang="en"><title>PSnAP: Accurate Synthetic Address Streams through Memory Profiles</title>
</titleInfo>
<titleInfo type="alternative" contentType="CDATA" lang="en"><title>PSnAP: Accurate Synthetic Address Streams through Memory Profiles</title>
</titleInfo>
<name type="personal"><namePart type="given">Catherine</namePart>
<namePart type="given">Mills</namePart>
<namePart type="family">Olschanowsky</namePart>
<affiliation>Department of Computer Science and Engineering, University of California at San Diego</affiliation>
<affiliation>E-mail: crmills@cs.ucsd.edu</affiliation>
<role><roleTerm type="text">author</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Mustafa</namePart>
<namePart type="given">M.</namePart>
<namePart type="family">Tikir</namePart>
<affiliation>San Diego Supercomputer Center</affiliation>
<affiliation>E-mail: mtikir@sdsc.edu</affiliation>
<role><roleTerm type="text">author</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Laura</namePart>
<namePart type="family">Carrington</namePart>
<affiliation>San Diego Supercomputer Center</affiliation>
<affiliation>E-mail: lcarring@sdsc.edu</affiliation>
<role><roleTerm type="text">author</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Allan</namePart>
<namePart type="family">Snavely</namePart>
<affiliation>Department of Computer Science and Engineering, University of California at San Diego</affiliation>
<affiliation>San Diego Supercomputer Center</affiliation>
<affiliation>E-mail: allans@cs.ucsd.edu</affiliation>
<affiliation>E-mail: allans@sdsc.edu</affiliation>
<role><roleTerm type="text">author</roleTerm>
</role>
</name>
<typeOfResource>text</typeOfResource>
<genre type="conference" displayLabel="OriginalPaper"></genre>
<originInfo><publisher>Springer Berlin Heidelberg</publisher>
<place><placeTerm type="text">Berlin, Heidelberg</placeTerm>
</place>
<dateIssued encoding="w3cdtf">2010</dateIssued>
<copyrightDate encoding="w3cdtf">2010</copyrightDate>
</originInfo>
<language><languageTerm type="code" authority="rfc3066">en</languageTerm>
<languageTerm type="code" authority="iso639-2b">eng</languageTerm>
</language>
<physicalDescription><internetMediaType>text/html</internetMediaType>
</physicalDescription>
<abstract lang="en">Abstract: Memory address traces are an important information source; they drive memory simulations for performance modeling, systems design and application tuning. For long running applications, the direct use of an address trace is complicated by its size. Previous attempts to reduce trace size incurred a substantial penalty with respect to trace accuracy. We propose a novel method of memory profiling that enables the generation of highly accurate synthetic traces with space requirements typically under 1% of the original traces. We demonstrate the synthetic trace accuracy in terms of cache hit rates, spatial-temporal locality scores and locality surfaces. Simulated cache hit rates from synthetic traces are within 3.5% of observed and on average are within 1.0% for L1 cache. Our profiles are on average 60 times smaller than compressed traces. The combination of small profile sizes and high similarity to original traces makes our technique uniquely applicable to performance modeling and trace driven simulation of large-scale parallel scientific applications.</abstract>
<relatedItem type="host"><titleInfo><title>Languages and Compilers for Parallel Computing</title>
<subTitle>22nd International Workshop, LCPC 2009, Newark, DE, USA, October 8-10, 2009, Revised Selected Papers</subTitle>
</titleInfo>
<name type="personal"><namePart type="given">Guang</namePart>
<namePart type="given">R.</namePart>
<namePart type="family">Gao</namePart>
<affiliation>Department of Electrical and Computer Engineering, University of Delaware, 19716, Newark, DE, USA</affiliation>
<affiliation>E-mail: ggao@capsl.udel.edu</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Lori</namePart>
<namePart type="given">L.</namePart>
<namePart type="family">Pollock</namePart>
<affiliation>Department of Computer and Information Sciences, University of Delaware, 19716, Newark, DE, USA</affiliation>
<affiliation>E-mail: pollock@cis.udel.edu</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">John</namePart>
<namePart type="family">Cavazos</namePart>
<affiliation>Department of Computer and Information Sciences, University of Delaware, 19716, Newark, DE, USA</affiliation>
<affiliation>E-mail: cavazos@cis.udel.edu</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Xiaoming</namePart>
<namePart type="family">Li</namePart>
<affiliation>Department of Electrical and Computer Engineering, University of Delaware, 19716, Newark, DE, USA</affiliation>
<affiliation>E-mail: xli@ece.udel.edu</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<genre type="book-series" displayLabel="Proceedings"></genre>
<originInfo><copyrightDate encoding="w3cdtf">2010</copyrightDate>
<issuance>monographic</issuance>
</originInfo>
<subject><genre>Book-Subject-Collection</genre>
<topic authority="SpringerSubjectCodes" authorityURI="SUCO11645">Computer Science</topic>
</subject>
<subject><genre>Book-Subject-Group</genre>
<topic authority="SpringerSubjectCodes" authorityURI="I">Computer Science</topic>
<topic authority="SpringerSubjectCodes" authorityURI="I14037">Programming Languages, Compilers, Interpreters</topic>
<topic authority="SpringerSubjectCodes" authorityURI="I14010">Programming Techniques</topic>
<topic authority="SpringerSubjectCodes" authorityURI="I15017">Data Structures</topic>
<topic authority="SpringerSubjectCodes" authorityURI="I21009">Computing Methodologies</topic>
<topic authority="SpringerSubjectCodes" authorityURI="I18016">Models and Principles</topic>
<topic authority="SpringerSubjectCodes" authorityURI="I13022">Computer Communication Networks</topic>
</subject>
<identifier type="DOI">10.1007/978-3-642-13374-9</identifier>
<identifier type="ISBN">978-3-642-13373-2</identifier>
<identifier type="eISBN">978-3-642-13374-9</identifier>
<identifier type="ISSN">0302-9743</identifier>
<identifier type="eISSN">1611-3349</identifier>
<identifier type="BookTitleID">211616</identifier>
<identifier type="BookID">978-3-642-13374-9</identifier>
<identifier type="BookChapterCount">30</identifier>
<identifier type="BookVolumeNumber">5898</identifier>
<identifier type="BookSequenceNumber">5898</identifier>
<part><date>2010</date>
<detail type="volume"><number>5898</number>
<caption>vol.</caption>
</detail>
<extent unit="pages"><start>353</start>
<end>367</end>
</extent>
</part>
<recordInfo><recordOrigin>Springer-Verlag Berlin Heidelberg, 2010</recordOrigin>
</recordInfo>
</relatedItem>
<relatedItem type="series"><titleInfo><title>Lecture Notes in Computer Science</title>
</titleInfo>
<name type="personal"><namePart type="given">David</namePart>
<namePart type="family">Hutchison</namePart>
<affiliation>Lancaster University, Lancaster, UK</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Takeo</namePart>
<namePart type="family">Kanade</namePart>
<affiliation>Carnegie Mellon University, Pittsburgh, PA, USA</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Josef</namePart>
<namePart type="family">Kittler</namePart>
<affiliation>University of Surrey, Guildford, UK</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Jon</namePart>
<namePart type="given">M.</namePart>
<namePart type="family">Kleinberg</namePart>
<affiliation>Cornell University, Ithaca, NY, USA</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Friedemann</namePart>
<namePart type="family">Mattern</namePart>
<affiliation>ETH Zurich, Zurich, Switzerland</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">John</namePart>
<namePart type="given">C.</namePart>
<namePart type="family">Mitchell</namePart>
<affiliation>Stanford University, Stanford, CA, USA</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Moni</namePart>
<namePart type="family">Naor</namePart>
<affiliation>Weizmann Institute of Science, Rehovot, Israel</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Oscar</namePart>
<namePart type="family">Nierstrasz</namePart>
<affiliation>University of Bern, Bern, Switzerland</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">C.</namePart>
<namePart type="family">Pandu Rangan</namePart>
<affiliation>Indian Institute of Technology, Madras, India</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Bernhard</namePart>
<namePart type="family">Steffen</namePart>
<affiliation>University of Dortmund, Dortmund, Germany</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Madhu</namePart>
<namePart type="family">Sudan</namePart>
<affiliation>Massachusetts Institute of Technology, MA, USA</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Demetri</namePart>
<namePart type="family">Terzopoulos</namePart>
<affiliation>University of California, Los Angeles, CA, USA</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Doug</namePart>
<namePart type="family">Tygar</namePart>
<affiliation>University of California, Berkeley, CA, USA</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Moshe</namePart>
<namePart type="given">Y.</namePart>
<namePart type="family">Vardi</namePart>
<affiliation>Rice University, Houston, TX, USA</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<name type="personal"><namePart type="given">Gerhard</namePart>
<namePart type="family">Weikum</namePart>
<affiliation>Max-Planck Institute of Computer Science, Saarbrücken, Germany</affiliation>
<role><roleTerm type="text">editor</roleTerm>
</role>
</name>
<originInfo><copyrightDate encoding="w3cdtf">2010</copyrightDate>
<issuance>serial</issuance>
</originInfo>
<identifier type="ISSN">0302-9743</identifier>
<identifier type="eISSN">1611-3349</identifier>
<identifier type="SeriesID">558</identifier>
<recordInfo><recordOrigin>Springer-Verlag Berlin Heidelberg, 2010</recordOrigin>
</recordInfo>
</relatedItem>
<identifier type="istex">B0EF03875545F368427F1A078BD79FB79F1A7AE2</identifier>
<identifier type="DOI">10.1007/978-3-642-13374-9_24</identifier>
<identifier type="ChapterID">24</identifier>
<identifier type="ChapterID">Chap24</identifier>
<accessCondition type="use and reproduction" contentType="copyright">Springer-Verlag Berlin Heidelberg, 2010</accessCondition>
<recordInfo><recordContentSource>SPRINGER</recordContentSource>
<recordOrigin>Springer-Verlag Berlin Heidelberg, 2010</recordOrigin>
</recordInfo>
</mods>
</metadata>
<enrichments><json:item><type>multicat</type>
<uri>https://api.istex.fr/document/B0EF03875545F368427F1A078BD79FB79F1A7AE2/enrichments/multicat</uri>
</json:item>
<istex:refBibTEI uri="https://api.istex.fr/document/B0EF03875545F368427F1A078BD79FB79F1A7AE2/enrichments/refBib"><teiHeader></teiHeader>
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</istex:refBibTEI>
<json:item><type>refBibs</type>
<uri>https://api.istex.fr/document/B0EF03875545F368427F1A078BD79FB79F1A7AE2/enrichments/refBibs</uri>
</json:item>
</enrichments>
</istex>
</record>
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