Experience with a clustered parallel reduction machine

Experience with a clustered parallel reduction machine

Source :

• Future Generation Computer Systems [ 0167-739X ] ; 1993.

English descriptors

• Teeft :
  • Abstract interpretation, Address calculations, Algorithm, Aliasing analysis, Amsterdam, Angular brackets, Annotation, Architecture, Average parallelism, Basic blocks, Beemster, Benchmark, Bracket, Catholic university, Chalmers univ, Changsha institute, Coarse grain, Coarse grain parallelism, Code generation, Code generation techniques, Code generator, Code generators, Code sequences, Comp, Compilation techniques, Compiler, Compiler construction, Computational demand, Computer architecture, Computer architecture conf, Computer science, Computer systems, Conf, Control integrity problem, Cprm, Current heap pointer, Cyclic, Cyclic fashion, Data structure, Data values, Declarative languages, Dependency, Dependency analysis, Dependency arcs, Dependency graph, Dept, Direct subdomains, Dutch waterboard, Efficient code, Efficient compilation, Efficient implementation, Efficient runtime support, Elsevier science publishers, Equivalent program, Exclusive access, Explicit annotations, Extra code, Final version, Fine grain parallelism, First argument, First elimination, Flow graphs, Fourier, Free university, Function bodies, Functional language, Functional languages, Functional program, Functional programming, Functional programming languages, Functional programs, Functional units, Garbage collector, Global, Global buses, Grain parallelism, Grain size, Grain size transformation, Graph reduction, Hartel, Heap pointer, Heap unit, Heap units, Hierarchical, Ieee trans, Imperative languages, Imperative programs, Inherent parallelism, Initial scheduler, Initial state, Input data, Input elements, Input language, Input lists, Instruction scheduler, Instruction scheduling, Intra cluster runtime support system, Koala, Koala code, Lambda, Lambda calculus, Langendoen, Languages europe, Lazy evaluation mechanism, Level optimisations, Library functions, Linear domain, Linear equations, List scheduling, Lncs, Lncs eindhoven, Lncs veldhoven, Machine cycle, Machine cycles, Macro, Maximum number, Medium grain parallelism, Medium size, Memory machine, Memory management, Memory manager, Memory references, Memory units, Methodology, Netherlands, Next output, Next section, Nijmegen, Node, Normal form, Normal order reduction, Optimisation, Other jobs, Output language, Parallel applications, Parallel architecture, Parallel architectures, Parallel computations, Parallel evaluation, Parallel execution, Parallel grains, Parallel graph reduction, Parallel jobs, Parallel phases, Parallel processing, Parallel reduction machine, Parallel reduction machines, Parallel reduction strategy, Parallel systems, Parallelism, Parent tasks, Performance loss, Peyton jones, Plasmeijer, Pointer, Predictable number, Primitive operations, Private heap, Process control, Process network, Process networks, Processor, Processor stack, Program analyses, Program analysis, Program transformation, Program transformations, Programmer, Programming, Programming languages, Programming methodology, Programming methodology group report, Reduction machine, Reduction machines, Referential, Referential transparency, Research interests, Research software, Risc, Risc processors, Runtime, Runtime support system, Same instruction, Same time, Sandwich reduction strategy, Sandwich strategy, Sasl program, Sasl programs, Scalable, Scheduler, Scheduler tree, Scheduling, Scheduling algorithm, Second argument, Second elimination, Senior lecturer, Sequential, Sequential part, Sequential version, Side effects, Sigplan notices, Simulation, Simulation studies, Single address space, Single cluster machine, Single instruction, Single vliw instruction, Software, Speedup, Spineless tagless, Spineless tagless machine, Stack, Stack code, Stack pointer, Stack units, Standard transformations, Statically type, Stock hardware, Stoffel, Stoffel compiler, Strictness, Strictness analysis, Subgraph, Synchronous process networks, Synthesis techniques, Systems architecture, Technical report dept, Time support system, Transformational methods, Transparency, Tree structure, Univ, Unlimited number, Untyped, Virtual registers, Vliw, Vliw architectures, Vliw code, Vliw instruction, Vliw machine, Vliw processor, Vliw processors, Vree.

Abstract

• https://api.istex.fr/ark:/67375/6H6-V1WZB2BM-2/fulltext.pdf

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