Improving Symbolic Model Checking by Rewriting Temporal Logic Formulae
Identifieur interne : 001C32 ( Istex/Checkpoint ); précédent : 001C31; suivant : 001C33Improving Symbolic Model Checking by Rewriting Temporal Logic Formulae
Auteurs : David Déharbe [Brésil] ; Anamaria Martins Moreira [Brésil] ; Christophe Ringeissen [France]Source :
- Lecture Notes in Computer Science [ 0302-9743 ]
Abstract
Abstract: A factor in the complexity of conventional algorithms for model checking Computation Tree Logic (CTL) is the size of the formulae, and, more precisely, the number of fixpoint operators. This paper addresses the following questions: given a CTL formula f, is there an equivalent formula with fewer fixpoint operators? and how term rewriting techniques may be used to find it? Moreover, for some sublogics of CTL, e.g. the sub-logic NF-CTL (no fixpoint computation tree logic), more efficient verification procedures are available. This paper also addresses the problem of testing whether an expression belongs or not to NF-CTL, and providing support in the choice of the most efficient amongst different available verification algorithms. In this direction, we propose a rewrite system modulo AC, and discuss its implementation in ELAN, showing how this rewriting process can be plugged in a formal verification tool.
Url:
DOI: 10.1007/3-540-45610-4_15
Affiliations:
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<front><div type="abstract" xml:lang="en">Abstract: A factor in the complexity of conventional algorithms for model checking Computation Tree Logic (CTL) is the size of the formulae, and, more precisely, the number of fixpoint operators. This paper addresses the following questions: given a CTL formula f, is there an equivalent formula with fewer fixpoint operators? and how term rewriting techniques may be used to find it? Moreover, for some sublogics of CTL, e.g. the sub-logic NF-CTL (no fixpoint computation tree logic), more efficient verification procedures are available. This paper also addresses the problem of testing whether an expression belongs or not to NF-CTL, and providing support in the choice of the most efficient amongst different available verification algorithms. In this direction, we propose a rewrite system modulo AC, and discuss its implementation in ELAN, showing how this rewriting process can be plugged in a formal verification tool.</div>
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